1. Field of the Invention
The present invention relates to a flash memory controller, a memory control circuit that includes the controller, a flash memory system, and a method for controlling data exchange between a host computer and a flash memory.
2. Description of the Related Art
In recent years, flash memories are widely adopted in semiconductor memories used in memory systems, such as memory cards and silicon disks. The flash memory is a kind of nonvolatile memory. Data stored in the flash memory is requested to be maintained, even when electric power is not supplied.
A NAND type flash memory is a kind of flash memory that is especially used in the above memory systems. Each of the plurality of memory cells included in the NAND type flash memory can be changed from an erasing state, where data indicating a logical value of “1” is stored, to a writing state, where data indicating a logical value of “0”, independent from other memory cells. In contrast, in a case where at least one memory cell from a plurality of memory cells, must be changed from a writing state to an erasing state, each memory cell can not change, independently from the other memory cells. At this time, in a predetermined number of memory cells, referred to as blocks, all the memory cells must become an erasing state at the same time. This total erasing operation is generally referred to as “block erasing”.
The reason why flash memories have the characteristic described above, is because it was assumed that flash memories would be handled in the same way as hard disk drives (HDD) in a computer system. A flash memory system that adopted a flash memory having this characteristic is ordinarily in conformity with standards of HDD, such as ATA (Advanced Technology Attachment). Therefore, in a computer system that has the above flash memory connected to a host computer, the host computer handles the flash memory system in the same way as an ordinary HDD.
However, a flash memory system in conformity with standards of HDD can not be connected to a host computer that does not have a specific interface adapted for HDD standards. In a case where a control circuit for controlling a flash memory is independent from the flash memory itself, there are cases where it is convenient to apply the control circuit to the memory interface of the host computer.
A controller which makes pseudo access possible, such as access to a direct volatile memory from outside, in accordance with instructions from an external bus, when data transferring is not carried out, is disclosed in Unexamined Japanese Patent Application KOKAI Publication No. 2002-328836. The controller disclosed in this reference can record data read from a flash memory, to RAM, and the RAM has a storage capacity corresponding to a few pages in a NAND type flash memory. As opposed to the aforementioned art, it is desirable to provide an easier structure for flexible access from a host computer to a flash memory.